1. Field of the Invention
The present invention relates to a method and apparatus for adaptive chip trim adjustment for integrated circuits.
2. Description of the Prior Art
It is desirable to be able to adjust the performance of semiconductor integrated circuits after processing has been completed to minimize variation associated with process tolerance. This adjustment or trimming procedure should be able to be applied to multiple interacting or non-interacting circuits on the same semiconductor die. It is desirable to be able to iterate the adjustment or change it to counteract changes in circuit performance caused by circuit interaction. For example, if circuit A is trimmed before circuit B and the subsequent trimming of circuit B changes the performance of circuit A, it is desirable to iterate circuit A's trim. It is also desirable to accomplish this trim or adjustment without increasing process complexity substantially.
Memory circuits such as a dynamic random access memory (DRAM), and a static random access memory (SRAM) have been a prime technology driver for semiconductor processing. As a result, most modern complementary metal oxide semiconductor (CMOS) and BICMOS processes are derivatives of semiconductor processes developed for memories. Most memory circuits have the capability of using the redundancy fuses needed to replace a bad bank of memory on a chip. These fuses can take the form of metal or polysilicon straps that are blown with a laser or electrically blown. Because of the price sensitivity of memory, fuse blow processes have been optimized for low cost and equipment to blow the fuses is readily available. The problem with the fuses is that they are not iterative in nature.
For iterative trims typically laser trimmed thin-film, thick-film, or nichrome resistors are used. A scheme is developed that senses the resistor resistance and uses the resistance value as a variable to alter the performance of the circuit. Resistor values are usually only increased by trim; but by careful design and order of trim of multiple resistors, iterative trim can be achieved. The thick-film and some of the thin-film resistors cannot be placed on chip and therefore require hybrid packaging. The nichrome resistors can be placed on chip. A problem with the use of trimmed resistors is that the analog value of resistance determines the circuit adjustment, so drift or corrosion of the resistor must be avoided. This process is inherently more expensive than using fuses.